Wednesday, January 6, 2021

DIFFERENT TYPES OF ADVANCED IC PACKAGE

 The packages are classified  on the basis of their  mounting position on a circuit board  into two types:

 

Through-Hole Mount Packages

They are designed during a means that the lead pins are stuck through one facet of the board and smoldered on the opposite. They're larger in size as compared to the opposite kind. These are majorly utilized in equipment to catch up on the board area and price limitations. Twin inline packages are one in every of the samples of through-hole mount packages.

To add on to it classification, Through-hole mount packages are available in ceramic and plastic sorts.

Through Hole IC PackagesThese square measure the foremost considerably used IC packages is Dual Inline Packages (DIP). similar to in 28-pin ATmega328, the pins square measure placed in parallel to every alternative extending sheer and arranged out on a black plastic housing that is rectangular in form. The pins square measure spaced at 0.1 inches. Further, the package varies in size because of the distinction within the variety of pins in numerous packages. The amount ranges from four to sixty four. These pins square measure placed during a manner that they'll be adjusted on to the middle of a bread board while not short-circuiting one another or maybe get smoldered into PCBs.

 

There area unit many sorts of DIP Packages, Plastic Dual In-Line Package (PDIP) and Modeled Dual In-Line Package (MDIP) area unit the few common varieties. Further, it may be classified as:


  • Standard - this can be the foremost common packaging. The pins area unit spaced 0.1” apart. 
  • Skinny - during this packaging, the area between the terminal rows is 7.62mm.
  • Shrink - kind of like the quality ones however the lead pitch is 1.778 mm. High pin density packaging is used when smaller in size.
  • Zig-Zag in Line Packages (ZIP)- The pins during this reasonably a package area unit inserted sheer to the circuit card. This kind of packaging was temporary and was principally employed in dynamic RAM chips. 
  • Pin Grid Array (PGA)- within the lead pitch is a pair of 2.54 millimetre and therefore the body is formed out of ceramics. The pins area unit organized vertically from the body and may be placed on a grid. This one sometimes suits a multi-pin packaging.

 

Surface Mount Packaging

Surface mount packaging follows the technology of mounting or putting the elements directly on the computer circuit board surface. Though this method of fabrication helps do things quickly, it conjointly will increase the probabilities of defects. This can be owing to the miniaturization of elements and conjointly as a result of they are mounted extraordinarily on the point of one another. This, in turn, ends up in creating it extraordinarily vital to discover the failure within the entire method. Again, Surface mount packaging conjointly uses ceramic or plastic molding.

Surface Mount IC Packages

 

The different forms of surface mount packages that use plastic molds are as following:


  • Small define L-leaded package- This kind has gull-wing type leads that lengthen on either direction from the body in associate degree L fashion and may be mounted directly on the board.
  • Quad Flat L-leaded Packages (QFP)- These are the same as SOP. However, the sole distinction is that the leads are drawn out in four directions rather than a pair of and are mounted directly on the board. They conjointly escort a sink with intrinsic heat spreader.
  • Ball Grid Array (BGA) - These have solder ball arrays on the rear surface of PCBs.
  • Fine Pitch Land Grid Array- These have solder land arrays on the rear surface of PCBs.
  • Wafer Level Chip Size Package- several Individual chips are created out of a packaged wafer that's cut out.

Sunday, December 13, 2020

Essential Terms in Advanced IC Packaging Technology

 Advanced IC packaging is evolving rapidly, design engineers and engineering managers must keep pace with this significant technology. Before seeking deeper into the packaging technology, it is important to know the fundamental terms that keep coming in advanced IC packaging.

  •   2.5D packaging:

In 2.5D packages, dies are stacked side by side on top of an interposer supported through-silicon vias(TSV) . The base, an interposer, provides connectivity between the chips.The 2.5D packages enable finer lines and spaces which is an upgradation to traditional 2D IC packaging technology 



  • 3D packaging:

In 3D IC packages, logic dies are stacked on one another or memory dies rather than creating an outsized system-on-chip (SoC), and dies are connected using a lively interposer. Unlike 2.5D IC packages that stack components on an interposer through conductive bumps or TSVs, a 3D IC package employs multiple layers of silicon wafers stalked together along side components using TSVs.

  • Chiplets:
Chiplets are a menu of modular chips  integrated into a package using die-to-die interconnect during a library . They are another type of 3D IC packaging that enable heterogeneous integration of CMOS devices with non-CMOS devices. In other words, they're smaller SoCs, or chiplets, rather than one big SoC during a package.


  • Fan out

Fan-out packages, during which connections are fanned out of the chip surface to facilitate more external I/Os, use an epoxy mold compound to completely embed the dies, in order that they don’t require process flows like wafer bumping, fluxing, flip-chip assembly, cleaning, underfill dispensing, and curing. That, in turn, eliminates the necessity for an interposer and makes the implementation of heterogeneous integration simpler.

  • Fan-out wafer-level packaging (FOWLP)


An improvement over wafer-level packaging (WLP), this system has been developed to supply more external contacts with silicon die. It embeds chips inside the epoxy molding compound then fabricates high-density redistribution layers (RDLs) and solder balls on the wafer surface to make a reconstituted wafer.




  • Heterogeneous integration


The integration of separately manufactured components into a higher-level assembly provides enhanced functionality and improved operating characteristics. It enables semiconductor device manufacturers to combine functional components from different manufacturing process flows into a single composite device.


  • High bandwidth memory (HBM)
HBM is a standardized stacked memory technology which gives wide channels for data. The HBM-based packaging stacks memory dies on top of every other and connects them using TSVs to make more I/Os and bandwidth.



  • Interposer

It’s a conduit utilized in multi-chip die or boards to undergo electrical signals during a package. An interposer is an electrical interface routing between one socket  to another; it either spreads the signal to a wider pitch or takes the connection to a special socket on the board.



  • Redistribution layer (RDL)

Redistribution layers are copper metal connection lines or traces that electrically connect one a part of the package with another. RDLs are created with layers of metal or polymer dielectric materials to stack dies on a package and thus relieve the I/O pitch on large chipsets. 

  • Through silicon via (TSV)
TSV is a technology in 2.5D and 3D packaging solutions. It provides a vertical interconnection that passes through a die’s silicon wafer. It’s manufactured in wafer form and is crammed with copper. TSV is an electrical connection through the whole thickness of the chip that makes the shortest possible path from one side of the chip to the opposite .




  

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DIFFERENT TYPES OF ADVANCED IC PACKAGE

 T he packages are classified  on the basis of their  mounting position on a circuit board  into two types:   Through-Hole Mount Packages Th...